Reduce Max PLL frequency to 1.4ghz
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1a1f4999ff
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d23e1fd8fc
2 changed files with 4 additions and 2 deletions
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@ -126,6 +126,7 @@ int dma::start()
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dma_reg.gpioreg[DMA_DEBUG+channel*0x40] = 7; // clear debug error flags
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dma_reg.gpioreg[DMA_DEBUG+channel*0x40] = 7; // clear debug error flags
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usleep(100);
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usleep(100);
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dma_reg.gpioreg[DMA_CS+channel*0x40] = DMA_CS_PRIORITY(7) | DMA_CS_PANIC_PRIORITY(7) | DMA_CS_DISDEBUG |DMA_CS_ACTIVE;
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dma_reg.gpioreg[DMA_CS+channel*0x40] = DMA_CS_PRIORITY(7) | DMA_CS_PANIC_PRIORITY(7) | DMA_CS_DISDEBUG |DMA_CS_ACTIVE;
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Started=true;
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return 0;
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return 0;
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}
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}
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@ -139,6 +140,7 @@ int dma::stop()
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usleep(100);
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usleep(100);
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dma_reg.gpioreg[DMA_DEBUG+channel*0x40] = 7; // clear debug error flags
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dma_reg.gpioreg[DMA_DEBUG+channel*0x40] = 7; // clear debug error flags
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usleep(100);
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usleep(100);
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Started=false;
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return 0;
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return 0;
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}
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}
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@ -260,7 +262,7 @@ int bufferdma::PushSample(int Index)
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if(last_sample>buffersize/4)
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if(last_sample>buffersize/4)
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{
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{
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start(); // 1/4 Fill buffer before starting DMA
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start(); // 1/4 Fill buffer before starting DMA
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Started=true;
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}
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}
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@ -207,7 +207,7 @@ int clkgpio::ComputeBestLO(uint64_t Frequency, int Bandwidth)
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// Constants taken https://github.com/raspberrypi/linux/blob/ffd7bf4085b09447e5db96edd74e524f118ca3fe/drivers/clk/bcm/clk-bcm2835.c#L1763
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// Constants taken https://github.com/raspberrypi/linux/blob/ffd7bf4085b09447e5db96edd74e524f118ca3fe/drivers/clk/bcm/clk-bcm2835.c#L1763
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//MIN RATE is NORMALLY 600MHZ
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//MIN RATE is NORMALLY 600MHZ
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#define MIN_PLL_RATE 200e6
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#define MIN_PLL_RATE 200e6
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#define MIN_PLL_RATE_USE_PDIV 1700e6
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#define MIN_PLL_RATE_USE_PDIV 1500e6 //1700 works but some ticky breaks in clock..PLL should be at limit
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#define MAX_PLL_RATE 4e9
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#define MAX_PLL_RATE 4e9
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#define XTAL_RATE 19.2e6
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#define XTAL_RATE 19.2e6
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double xtal_freq_recip = 1.0 / XTAL_RATE; // todo PPM correction
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double xtal_freq_recip = 1.0 / XTAL_RATE; // todo PPM correction
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