rpitx/csdr
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

Working on phase detector of the PLL

Browse source
This commit is contained in:
ha7ilm 2016-05-11 08:59:54 +02:00
parent e084341ca2
commit ed35bb96e7
1 changed files with 11 additions and 9 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

20
libcsdr.c
View file

@ -1360,20 +1360,22 @@ void pll_cc(pll_t* p, complexf* input, float* output_dphase, complexf* output_nc
p->output_phase += p->dphase; p->output_phase += p->dphase;
while(p->output_phase>PI) p->output_phase-=2*PI; while(p->output_phase>PI) p->output_phase-=2*PI;
while(p->output_phase<-PI) p->output_phase+=2*PI; while(p->output_phase<-PI) p->output_phase+=2*PI;
if(output_nco) //we don't output anything if it is a NULL pointer complexf current_nco;
{ iof(current_nco,i) = sin(p->output_phase);
iof(output_nco,i) = sin(p->output_phase); qof(current_nco,i) = cos(p->output_phase);
qof(output_nco,i) = cos(p->output_phase); if(output_nco) output_nco[i] = current_nco; //we don't output anything if it is a NULL pointer
}
//accurate phase detector: calculating error from phase offset
//calculating error from phase offset
float input_phase = atan2(iof(input,i),qof(input,i)); float input_phase = atan2(iof(input,i),qof(input,i));
float new_dphase = input_phase - p->output_phase; //arg(input[i]/abs(input[i]) * conj(current_output_vco[i])) float new_dphase = input_phase - p->output_phase;
while(new_dphase>PI) new_dphase-=2*PI; while(new_dphase>PI) new_dphase-=2*PI;
while(new_dphase<-PI) new_dphase+=2*PI; while(new_dphase<-PI) new_dphase+=2*PI;
//calculating error from two complex samples //modeling analog phase detector: abs(input[i] * conj(current_nco))
//qof(&current_nco,0)=-qof(&current_nco,0); //calculate conjugate
//complexf multiply_result;
//cmult(&multiply_result, &input[i], &current_nco);
//float new_dphase = absof(&multiply_result,0);
if(p->pll_type == PLL_2ND_ORDER_IIR_LOOP_FILTER) if(p->pll_type == PLL_2ND_ORDER_IIR_LOOP_FILTER)
{ {